Instruction Mutation

Instruction mutation is a fuzzing input generation technique used in CPU verification that randomly generates and mutates instructions defined in an instruction set architecture (ISA). It produces diverse instruction sequences as test inputs to exercise target hardware implementations and uncover bugs through coverage-guided exploration.

Context in CPU Fuzzing

Instruction mutation is a core component of differential fuzz testing frameworks for CPU RTL verification. In DifuzzRTL, it works alongside a register-coverage metric and cross-checking against an ISA simulator to systematically find discrepancies between an RTL implementation and its reference behavioral model.

Related Techniques

• Random instruction generation — A sub-component technique that is part of the broader instruction mutation approach, responsible for the random generation half of generating and mutating instructions.

Tools Using Instruction Mutation

• DifuzzRTL — A differential fuzz testing framework for CPU verification that uses instruction mutation to randomly generate and mutate instructions defined in the ISA for comprehensive testing.

Application Beyond CPU Verification

Instruction mutation also appears in robotic manipulation testing contexts. In the VLATest framework for evaluating vision-language-action (VLA) models, task instruction mutations are investigated as a factor impacting model performance, applying the concept of perturbing task instructions to assess robustness in diverse scenarios.