Instruction Mutation
TechniqueInstruction mutation is a fuzzing input generation technique that randomly generates and mutates instructions defined in an instruction set architecture (ISA) to enable comprehensive testing of processor implementations.
First seen 6/24/2026
Last seen 6/24/2026
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Instruction Mutation
Instruction mutation is a fuzzing input generation technique used in CPU verification that randomly generates and mutates instructions defined in an instruction set architecture (ISA). It produces diverse instruction sequences as test inputs to exercise target hardware implementations and uncover bugs through coverage-guided exploration.
Context in CPU Fuzzing
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2 connectionsAs a key feature, the framework applies instruction mutation to broaden test coverage by altering instructions.
The feature description frames instruction mutation as encompassing random generation and mutation, implying that generation is part of the broader mutation technique.
CITATIONS
3 sources3 citations — click to collapse
[1] Instruction mutation randomly generates and mutates instructions defined in the ISA for comprehensive testing. DifuzzRTL — CPU RTL Differential Fuzzer | Open Awesome
[2] DifuzzRTL is a differential fuzz testing framework for CPU verification that uses register-coverage and cross-checks results against an ISA simulator. DifuzzRTL — CPU RTL Differential Fuzzer | Open Awesome
[3] Task instruction mutations are investigated as a factor impacting VLA model performance in the VLATest framework. VLATest: Testing and Evaluating Vision-Language-Action Models for Robotic Manipulation