Glitch leakage

Technique

Glitch leakage is a physical side-channel leakage effect that captures information leaked through transient (intra-cycle) value changes at a CMOS gate. It is modeled via a gate's computational base, and is used alongside value and transition leakage when reasoning about hardware compliance with leakage contracts.

First seen 6/26/2026

Last seen 6/26/2026

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Definition

Glitch leakage is a physical side-channel leakage effect that arises due to the change in value a gate experiences within a clock cycle. Because the evaluation of a CMOS gate is not instantaneous and its output is not propagated instantaneously through its outgoing wires, an input change can force a cascade of output adjustments in connected gates before the cycle settles. This intra-cycle transient behavior is what the term "glitch" refers to [FGP+18].

Modeling

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Closing the Gap: Leakage Contracts for Processors with Transitions and Glitches ← uses 86% 1e

They formalize and incorporate glitch effects into their leakage model.

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CITATIONS

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[1] Glitch leakage arises due to the change in value a gate experiences within a clock cycle, because gate evaluation and output propagation are not instantaneous. Leakage Contracts for Processors with Transitions and Glitches

[2] A common approximation of glitch leakage is that an adversary observing a gate g can gain information about all registers and circuit inputs in the gate's computational base Cg. Leakage Contracts for Processors with Transitions and Glitches

[3] The glitch-extended gate leakage is defined as λg(σ_{i−1}, σ_i) := C_g(σ_i). Leakage Contracts for Processors with Transitions and Glitches

[4] Value leakage is λg(σ_{i−1}, σ_i) := g(σ_i), the gate's settled output at the end of the clock cycle. Leakage Contracts for Processors with Transitions and Glitches

[5] Transition leakage is λg(σ_{i−1}, σ_i) := g(σ_{i−1}) ‖ g(σ_i), capturing all possible transitions. Leakage Contracts for Processors with Transitions and Glitches

[6] The overall per-cycle circuit leakage is the concatenation ⟨λ_g(σ_{i−1}, σ_i) | g ∈ G⟩. Leakage Contracts for Processors with Transitions and Glitches

[7] Hardware compliance with a contract requires that any leakage detectable in the hardware, including glitch leakage, is also leaked in the contract when computing with the same data. Leakage Contracts for Processors with Transitions and Glitches