Coverage-driven test generation
TechniqueCoverage-driven test generation is a hardware/system verification methodology that uses structured feedback over pre-defined coverage bins to constrain stimulus generation, drive the simulation campaign toward un-hit bins, and pair each generated transaction with an explicit oracle (reference model, monitors, scoreboards, and assertions). The technique iteratively samples, executes, observes, and scores until a total campaign budget is exhausted, with engineers manually inspecting coverage gaps to refine constraints, illegal bins, and sequences. In contrast, prior academic results show that purely coverage-driven software test generation can leave behaviors untested when those behaviors are not captured by structural coverage signals, motivating documentation-driven or LLM-guided alternatives; however, these do not directly define hardware-style coverage-driven campaigns.
WIKI
Overview
Coverage-driven test generation is a verification technique in which the verification engineer defines an explicit set of coverage bins describing functional, structural, or configuration-relevant states of the design under test (DUT), then uses feedback from sampling these bins to constrain and steer stimulus generation. The goal is to ensure that meaningful subsets of the DUT's operational state space are exercised, with each generated stimulus paired to an explicit oracle that determines whether observed behavior is correct.
This technique is widely used in hardware and system-on-chip (SoC) verification flows, where it typically appears alongside constrained-random verification (CRV) and reference-model-based or scoreboard-based oracles. It is distinct from pure random testing because the stimulus distribution is biased by coverage feedback, and distinct from directed testing because the bias is updated automatically as bins are hit.