Overview

Nursultan Kabylkas is listed with a UC Santa Cruz affiliation in the paper "Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation." The paper lists Kabylkas with the email address nkabylka@ucsc.edu and the location Santa Cruz, CA, USA.

Research publication

Kabylkas is one of the authors of "Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation," alongside Tommy Thorn, Shreesha Srinath, Polychronis Xekalakis, and Jose Renau. The ACM reference in the paper identifies it as a 2021 publication in The 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-54), held October 18–22, 2021, in Athens, Greece.

The paper presents tools for RISC-V processor verification engineers. Its abstract describes Logic Fuzzer (LF) as a tool that expands verification-space exploration without requiring additional verification tests by randomizing design-under-test states or control signals where functionality is not affected. The paper also presents Dromajo as a processor verification framework for RISC-V cores and describes it as an RV64GC emulator designed specifically for co-simulation purposes.

Related entities

• Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation — authored by Nursultan Kabylkas.
• UC Santa Cruz — listed affiliation for Nursultan Kabylkas in the paper.