Eitan Marcus

Person

Eitan Marcus is a computer scientist associated with IBM Research in Haifa and with research on functional processor verification, test program generation, functional coverage, and constraint-based modeling languages.

First seen 5/23/2026

Last seen 5/26/2026

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Overview

Eitan Marcus is a computer scientist whose documented work is in hardware functional verification and test-program generation. A 2004 author biography describes him as a research staff member in the Verification Technologies Department at the IBM Research Laboratory in Haifa, with research interests including test program generation, functional coverage, and constraint-based modeling languages. The same biography states that he holds a BS in computer science from Columbia University and an MS in computer science from Carnegie Mellon University. ^[1]

Work on functional processor verification

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RELATIONSHIPS

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Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification ← authored by 100% 1e

The paper is authored by Eitan Marcus among others

Constraint-based Random Stimuli Generation for Hardware Verification ← authored by 100% 1e

Eitan Marcus is listed as an author of the paper.

LINKED ENTITIES

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Carnegie Mellon University educated_at The biography states that Marcus has an MS in computer science from Carnegie Mellon University.

CITATIONS

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6 citations — click to expand

[1] Eitan Marcus was described in 2004 as a research staff member in the Verification Technologies Department at the IBM Research Laboratory in Haifa, with interests in test program generation, functional coverage, and constraint-based modeling languages. Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification

[2] Marcus has a BS in computer science from Columbia University and an MS in computer science from Carnegie Mellon University. Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification

[3] Marcus was an author of “Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification,” an IBM Research Lab, Haifa article about model-based random test-program generation for processor verification. Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification

[4] The Genesys-Pro article describes Genesys-Pro as a second-generation model-based test program generation tool with a more expressive test-template language and more constraint-solving processing power than Genesys. Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification

[5] Marcus was a coauthor of “Constraint-based Random Stimuli Generation for Hardware Verification,” an AAAI 2006 paper from IBM Haifa Research Lab. Constraint-based Random Stimuli Generation for Hardware Verification

[6] The AAAI 2006 paper reports on IBM random stimuli generation for hardware verification using AI techniques including knowledge representation, expert systems, and constraint satisfaction. Constraint-based Random Stimuli Generation for Hardware Verification