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Verification of the IBM RISC System/6000 by a Dynamic Biased Pseudo-Random Test Program Generator

Paper
First seen 8/1/2026
Last seen 8/1/2026
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A. Aharon authored by → 100% 1e
A. Aharon is listed as a co-author of this paper.
A. Bar-David authored by → 100% 1e
A. Bar-David is listed as a co-author of this paper.
B. Dorfman authored by → 100% 1e
B. Dorfman is listed as a co-author of this paper.
E. Gofman authored by → 100% 1e
E. Gofman is listed as a co-author of this paper.
M. Leibowitz authored by → 100% 1e
M. Leibowitz is listed as a co-author of this paper.
V. Shwartzbund authored by → 100% 1e
V. Shwartzbund is listed as a co-author of this paper.
The paper presents verification of the IBM RISC System/6000 using dynamic biased pseudo-random test program generation.
IBM RISC System/6000 evaluates → 100% 1e
The paper describes verification of the IBM RISC System/6000 processor.