Test Program Generation for Functional Verification of PowerPC Processors in IBM

Paper

“Test Program Generation for Functional Verification of PowerPC Processors in IBM” is a 1995 paper by Aharon, Goodman, Levinger, Lichtenstein, Malka, Metzger, Molcho, and Shurek. The available evidence identifies it as a Design Automation Conference paper on test program generation for functional verification of IBM PowerPC processors.

First seen 5/26/2026

Last seen 8/1/2026

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Overview

“Test Program Generation for Functional Verification of PowerPC Processors in IBM” is a paper on test program generation for functional verification of PowerPC processors at IBM. The cited bibliographic entry lists the authors as Aharon, Goodman, Levinger, Lichtenstein, Malka, Metzger, Molcho, and Shurek and gives the publication year as 1995.

Bibliographic details

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RELATIONSHIPS

22 connections

Y. Malka authored by → 100% 2e

Y. Malka is listed as a co-author of this paper.

IBM published by → 90% 2e

The paper concerns functional verification of PowerPC processors at IBM.

A. Aharon authored by → 100% 2e

A. Aharon is listed as a co-author of this paper.

M. Levinger authored by → 100% 2e

M. Levinger is listed as a co-author of this paper.

Y. Lichtenstein authored by → 100% 2e

Y. Lichtenstein is listed as a co-author of this paper.

PowerPC Processor Verification mentions → 100% 2e

The paper is specifically about test program generation for PowerPC processor verification.

Metzger, C. authored by → 100% 1e

Metzger, C. is listed as a co-author of the paper on test program generation for PowerPC.

Molcho, M. authored by → 100% 1e

Molcho, M. is listed as a co-author of the paper on test program generation for PowerPC.

Shurek, G. authored by → 100% 1e

Shurek, G. is listed as a co-author of the paper on test program generation for PowerPC.

test program generation uses → 100% 1e

The paper is specifically about test program generation techniques for functional verification.

Functional Verification uses → 100% 1e

The paper addresses functional verification of PowerPC processors.

PowerPC evaluates → 95% 1e

The paper evaluates test program generation for PowerPC processors.

D. Goodman authored by → 100% 1e

D. Goodman is listed as a co-author of this paper.

C. Metzger authored by → 100% 1e

C. Metzger is listed as a co-author of this paper.

M. Molco authored by → 100% 1e

M. Molco is listed as a co-author of this paper.

G. Shurek authored by → 100% 1e

G. Shurek is listed as a co-author of this paper.

Test Program Generation for Functional Verification uses → 100% 1e

The paper presents test program generation for functional verification of PowerPC processors.

Aharon, A. authored by → 100% 1e

Aharon, A. is listed as a co-author of the paper on test program generation for PowerPC.

Goodman, D. authored by → 100% 1e

Goodman, D. is listed as a co-author of the paper on test program generation for PowerPC.

Levinger, M. authored by → 100% 1e

Levinger, M. is listed as a co-author of the paper on test program generation for PowerPC.

Lichtenstein, Y. authored by → 100% 1e

Lichtenstein, Y. is listed as a co-author of the paper on test program generation for PowerPC.

Malka, Y. authored by → 100% 1e

Malka, Y. is listed as a co-author of the paper on test program generation for PowerPC.

LINKED ENTITIES

1 links

Constraint-based Random Stimuli Generation for Hardware Verification cited_by_source_context The provided evidence is from an AAAI PDF titled as a constraint-based random stimuli generation paper, whose reference list includes the 1995 PowerPC test program generation paper.

CITATIONS

5 sources

5 citations — click to expand

[1] The paper is titled “Test program generation for functional verification of PowerPC processors in IBM.” [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[2] The cited authors are Aharon, Goodman, Levinger, Lichtenstein, Malka, Metzger, Molcho, and Shurek. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[3] The bibliographic entry gives the publication year as 1995. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[4] The paper appeared in the 32nd Design Automation Conference (DAC95), pages 279–285. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI

[5] The available source summarizes IBM random stimuli generation for hardware verification as a complex AI-based application and says research continued into CSP and knowledge-representation techniques. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI