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Code Generation for Custom Architectures using Constraint Programming

Paper
First seen 6/9/2026
Last seen 6/9/2026
Evidence 19 chunks

NEIGHBORHOOD

40 nodes · 64 edges
graph · Code Generation for Custom Architectures using Constraint Programming · depth=1

RELATIONSHIPS

39 connections
Code Generation uses → 100% 2e
The thesis addresses automatic code generation for custom architectures.
Data Assignment uses → 100% 2e
Data assignment is addressed in the thesis as a key subproblem of code generation.
Integer Linear Programming mentions → 85% 2e
Integer linear programming is mentioned as an alternative approach to constraint programming for code generation.
Register Allocation uses → 95% 2e
Register allocation is discussed and used within the code generation framework.
Modulo Scheduling uses → 95% 2e
Modulo scheduling is used as an additional set of constraints for loop scheduling in the thesis.
intermediate representation uses → 95% 2e
The code generation framework uses intermediate representations as input to the back end.
Constraint Programming uses → 100% 2e
The thesis uses constraint programming as the core paradigm for modeling code generation problems.
Very Large Instruction Word mentions → 85% 2e
VLIW architectures are mentioned in the context of related code generation work.
ePUMA Architecture evaluates → 95% 2e
The thesis targets and evaluates code generation for the ePUMA architecture.
EIT Architecture evaluates → 95% 2e
The thesis targets and evaluates code generation for the EIT architecture.
Global Constraints uses → 95% 2e
Global constraints are used extensively throughout the thesis for modeling code generation.
Cumulative Global Constraint uses → 95% 2e
The cumulative global constraint is used for VLIW and SIMD groupings in scheduling.
Non-overlapping Rectangles uses → 95% 2e
Data assignment is modeled as non-overlapping rectangles using the diff2 global constraint.
Macro-SIMDization mentions → 85% 1e
Macro-SIMDization is mentioned as a related approach for streaming applications.
Micro-SIMDization mentions → 90% 1e
Micro-SIMDization is the approach taken in the thesis for kernel-level SIMD code generation.
Polyhedral Compilation mentions → 80% 1e
Polyhedral compilation is mentioned as a related technique used by other approaches.
Superblock Instruction Scheduling mentions → 85% 1e
Superblock instruction scheduling is discussed in the related work section.
Dynamic Programming mentions → 80% 1e
Dynamic programming is mentioned as used by related work for combined instruction selection and scheduling.
Subgraph Isomorphism mentions → 80% 1e
Subgraph isomorphism is mentioned as used by Unison for instruction selection.
Directed Acyclic Graph mentions → 85% 1e
Directed acyclic graphs are used to represent application basic blocks in code generation.
Coarse-Grained Reconfigurable Architecture mentions → 80% 1e
Coarse-grained reconfigurable architectures are mentioned in the context of modulo scheduling.
Stream Graph Scheduling mentions → 80% 1e
Stream graph scheduling is mentioned in the context of modulo scheduling for embedded systems.
Unison mentions → 90% 1e
Unison is mentioned as a related integrated code generation project.
Application-set driven architecture exploration is a topic covered in one of the included papers.
Inverse Discrete Cosine Transformation mentions → 90% 1e
IDCT is mentioned as an example of a complex instruction implemented in the ePUMA architecture.
Mehmet Ali Arslan authored by → 100% 1e
The doctoral thesis is authored by Mehmet Ali Arslan.
Krzysztof Kuchcinski authored by → 70% 1e
Krzysztof Kuchcinski supervised the thesis and is acknowledged.
Lund University published by → 100% 1e
The thesis was published by the Department of Computer Science, Lund University.
Instruction Selection uses → 100% 1e
Instruction selection is one of the code generation subproblems addressed in the thesis.
Instruction Scheduling uses → 100% 1e
Instruction scheduling is one of the code generation subproblems addressed in the thesis.
JaCoP uses → 100% 1e
JaCoP is used as the constraint solver framework throughout the thesis.
Diff2 Global Constraint uses → 95% 1e
The diff2 global constraint is used to model data assignment as non-overlapping rectangles.
Search Space Heuristics uses → 90% 1e
Search space heuristics are employed to guide the constraint solver.
Branch-and-Bound uses → 90% 1e
Branch-and-bound is used as a technique to search for optimal solutions in the constraint programming framework.
Pareto Points uses → 90% 1e
Pareto points are used in the architecture exploration paper included in the thesis.
Lifetime Analysis uses → 90% 1e
Lifetime analysis is used to determine when data is live for data assignment.
Permutation Vector Optimization uses → 90% 1e
Permutation vector optimization is addressed as a custom memory problem for SIMD architectures.
Loop Unrolling uses → 85% 1e
Loop unrolling is used in combination with modulo scheduling in the thesis.
Domain Specific Language uses → 85% 1e
A domain specific language is used as a higher-level programming interface in one of the included papers.