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Univ. Paris-Sud, Laboratoire LRI

Organization WIKI v1 · 5/25/2026

Univ. Paris-Sud, Laboratoire LRI, UMR8623, was listed as the Orsay, France affiliation for Abderrahmane Feliachi, Yakoub Nemouchi, and Burkhart Wolff in the 2013 paper “Test Program Generation for a Microprocessor: A Case Study.” The paper describes formal-methods-based test program generation for validating microprocessor instruction-set conformance using Isabelle/HOL and HOL-TestGen.

Overview

Univ. Paris-Sud, Laboratoire LRI, UMR8623 is identified in the available evidence as an academic laboratory affiliation in Orsay, F-91405, France. In the 2013 paper Test Program Generation for a Microprocessor: A Case Study, the affiliation line lists “Univ. Paris-Sud, Laboratoire LRI, UMR8623, Orsay, F-91405, France” and also lists “CNRS, Orsay, F-91405, France” under the same author affiliation block. [C1]

Documented affiliates in the evidence

The same publication lists Abderrahmane Feliachi, Yakoub Nemouchi, and Burkhart Wolff with affiliation marker “2,” corresponding to Univ. Paris-Sud, Laboratoire LRI, UMR8623, Orsay, France, and provides their email addresses in the @lri.fr domain. [C2]

Research context represented in the evidence

The cited paper addresses test program generation for microprocessors in certification-oriented settings. Its abstract states that the case study uses a formal model of a microprocessor to generate test programs that validate whether a microprocessor correctly implements the specified instruction set. [C3]

The work is described as being built on an existing model developed with an operating system in Isabelle/HOL, and it uses HOL-TestGen, described in the paper as a model-based testing environment and an extension of Isabelle/HOL. The authors report developing conformance test scenarios in which processor models were used to synthesize test programs that were run against real hardware in the loop. [C4]

Technical themes

Based on the publication evidence, technical topics associated with the listed LRI-affiliated authors include:

  • formal microprocessor modeling;
  • model-based test generation;
  • Isabelle/HOL-based verification and testing workflows;
  • HOL-TestGen;
  • conformance testing of instruction-set behavior;
  • hardware-in-the-loop execution of generated test programs. [C3][C4]

CITATIONS

4 sources
4 citations
[1] C1: Univ. Paris-Sud, Laboratoire LRI, UMR8623 is listed as an Orsay, France affiliation, with CNRS also listed in the same affiliation block. Test Program Generation for a Microprocessor: A Case Study
[2] C2: Abderrahmane Feliachi, Yakoub Nemouchi, and Burkhart Wolff are listed with affiliation marker 2 corresponding to Univ. Paris-Sud, Laboratoire LRI, UMR8623, and with @lri.fr email addresses. Test Program Generation for a Microprocessor: A Case Study
[3] C3: The paper presents a case study using a formal model of a microprocessor to generate test programs that validate whether the processor implements the specified instruction set correctly. Test Program Generation for a Microprocessor: A Case Study
[4] C4: The case study was built on an existing Isabelle/HOL model, used HOL-TestGen as a model-based testing extension of Isabelle/HOL, and developed conformance test scenarios run against real hardware in the loop. Test Program Generation for a Microprocessor: A Case Study