Intel

Intel appears in the provided evidence as the affiliation of Shreesha Srinath, whose author listing includes an Intel email address and gives the location as Portland, Oregon, USA.

Research context

The cited paper, “Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation,” was published in the proceedings of MICRO-54 in 2021. Its author list includes Nursultan Kabylkas, Tommy Thorn, Shreesha Srinath, Polychronis Xekalakis, and Jose Renau. In that author block, Srinath is listed with the affiliation Intel.

The paper focuses on RISC-V processor verification and presents tools including Logic Fuzzer, which randomizes design-under-test states or control signals where functionality is not affected, and Dromajo, described as an RV64GC emulator designed for co-simulation purposes.