Skip to content
STIMSMITH

SystemVerilog Coverage Models

CodeArtifact WIKI v1 · 5/25/2026

SystemVerilog Coverage Models are functional coverage artifacts used in RISC-V verification flows to measure exercised ISA features and system behaviors. In the provided evidence, ImperasFC/ImperasSC can auto-generate these models for RISC-V ISA features, and ImperasFC can generate them directly from the ISA specification. Because the models are conventional SystemVerilog, results can be viewed in standard coverage reporting tools such as Verdi and extended by users for custom features and cross-coverage.

Overview

SystemVerilog Coverage Models are functional coverage artifacts used in RISC-V verification to measure how thoroughly stimulus exercises ISA features and system behaviors. The evidence describes functional coverage and stimulus coverage as metrics for understanding coverage gaps in RISC-V verification, with automatically generated coverage models providing detailed insight into those gaps. [C1]

Generation

The evidence identifies ImperasFC / ImperasSC as tools that auto-generate SystemVerilog coverage models for RISC-V ISA features. [C2] In a hybrid RISC-V verification workflow, ImperasFC is described as generating SystemVerilog coverage models directly from the ISA specification after constrained-random sweeps. [C3]

Role in Coverage Closure

SystemVerilog Coverage Models support coverage closure by making functional coverage gaps visible after random or directed testing. The evidence describes a workflow that begins with constrained-random sweeps, followed by functional coverage analysis using ImperasFC-generated SystemVerilog coverage models. Coverage gaps are then highlighted and closed in an iterative flow. [C3]

Directed suites can complement this process by targeting areas where random stimulus leaves gaps. The evidence gives examples of ImperasTS suites for vector, MMU, PMP, and ePMP features, and describes the use of directed TS-MMU tests after coverage analysis exposed weak points in Sv39 and Sv48 page table walks. [C4]

Tool Integration

Because the functional coverage is conventional SystemVerilog, the evidence states that results can be viewed in standard coverage reporting tools such as Verdi. [C5] The same evidence also notes that users can extend the ImperasFC functional coverage models to add coverage for custom features, cross-coverage points, and similar needs. [C6]

The models are shown as part of a broader SystemVerilog testbench integration, with coverage results merged in Verdi and failing cases replayed deterministically in VCS as part of an iterative closure loop. [C7]

Shift-Left Use

Coverage analysis can begin before RTL using ImperasSC, enabling a shift-left verification approach. Once RTL becomes available, the evidence describes coverage gaps being highlighted and closed, with results merged in Verdi and failing cases replayed in VCS. [C7]

Key Characteristics

  • Auto-generated for RISC-V ISA features by ImperasFC/ImperasSC. [C2]
  • Generated directly from the ISA specification in the ImperasFC flow. [C3]
  • Conventional SystemVerilog, enabling use with standard coverage reporting tools such as Verdi. [C5]
  • Extensible by users for custom features and cross-coverage points. [C6]
  • Used in hybrid constrained-random and directed-test workflows for coverage closure. [C3][C4]

LINKED ENTITIES

2 links
ImperasFC GENERATES
Verdi REPORTS_COVERAGE_RESULTS_FOR

CITATIONS

7 sources
7 citations
[1] SystemVerilog Coverage Models are used to measure functional coverage of RISC-V ISA features and system behaviors and to expose coverage gaps. source
[2] ImperasFC and ImperasSC auto-generate SystemVerilog coverage models for RISC-V ISA features. source
[3] A hybrid workflow uses constrained-random sweeps followed by ImperasFC functional coverage analysis, with ImperasFC generating SystemVerilog coverage models directly from the ISA specification. source
[4] Directed ImperasTS suites can target gaps left by random stimulus, including vector, MMU, PMP, and ePMP areas; the evidence gives an example involving Sv39 and Sv48 page table walks. source
[5] Because ImperasFC functional coverage is conventional SystemVerilog, results can be viewed in standard coverage reporting tools such as Verdi. source
[6] Users can extend ImperasFC functional coverage models to add custom feature coverage and cross-coverage points. source
[7] Coverage analysis can begin before RTL using ImperasSC; once RTL is available, gaps are highlighted and closed, results are merged in Verdi, and failing cases are replayed in VCS. source