SEQ Sequential Reference Model
CodeArtifactSEQ is a Y86-64 reference processor model used as the comparison target in formal verification of pipelined Y86-64 microprocessors.
First seen 5/25/2026
Last seen 5/25/2026
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Overview
SEQ Sequential Reference Model is a code artifact associated with the Y86-64 instruction-set architecture. In the cited verification work, “the SEQ processor” is used as “a reference version of the Y86-64 ISA,” meaning pipelined Y86-64 implementations are checked against SEQ as the architectural reference behavior. [C1]
Verification role
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[1] SEQ is used as a reference version of the Y86-64 ISA in verification. Formal Verification of Pipelined Y86-64 Microprocessors with UCLID5
[2] The source acknowledges that SEQ could be incorrect, but says this is easier to test by conventional means. Formal Verification of Pipelined Y86-64 Microprocessors with UCLID5