Skip to content
STIMSMITH

Rocket Core

CodeArtifact
First seen 6/6/2026
Last seen 6/24/2026
Evidence 17 chunks

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

9 connections
RISC-V implements → 100% 5e
Rocket Core is a RISC-V processor core implementing RV64G,C ISA.
TheHuzz ← evaluates 100% 3e
TheHuzz is evaluated on the Rocket Core processor.
DiFuzzRTL ← evaluates 100% 2e
DifuzzRTL was previously used to evaluate the Rocket Core processor.
ProcessorFuzz ← evaluates 100% 2e
ProcessorFuzz was evaluated on the Rocket Core processor.
Generalizing Tandem Simulation: Connecting High-level and RTL Simulation Models ← evaluates 93% 2e
The paper evaluates Rocket Core as a case study
Chisel HDL implements → 95% 1e
Rocket Core is designed in Chisel HDL.
Rocket Chip SoC Generator part of → 90% 1e
Rocket Core can be generated using the Rocket Chip SoC Generator framework.
design_repos.json ← mentions 88% 1e
The configuration file includes a 'rocket' entry used for the Rocket core experiment.
Chisel derived from → 93% 1e
Rocket Core was generated using Chisel hardware generator