Register Alias Table

Concept

A Register Alias Table (RAT) is a hardware table in a register-renaming stage that records the most recent mapping from each logical register specifier to a physical destination register, enabling source operands to be renamed before dispatch to the reservation station.

First seen 5/28/2026

Last seen 5/28/2026

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Definition

A Register Alias Table (RAT) is a hardware table used in a processor's register-renaming stage. It holds the most recent mapping of each logical register specifier to a physical destination register (Pdst). During renaming, the RAT is used to rename an instruction's logical source registers into physical register specifiers. The resulting physical register identifiers are forwarded to the reservation station so the instruction can determine when it is ready to execute.

Role in register renaming

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The RAT is part of the register renaming stage hardware.

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CITATIONS

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[1] A Register Alias Table is a table with the most recent mapping of each logical register specifier to a physical destination register. [PDF] UVM-based verification of RISC-V superscalar processors

[2] The RAT is used to rename input/source logical registers, and the renamed physical destination identifiers are forwarded to the reservation station to help determine when an instruction can execute. [PDF] UVM-based verification of RISC-V superscalar processors

[3] In the described register-renaming stage, the hardware arrays include the Free List, Register Alias Table, and Checkpoint Table. [PDF] UVM-based verification of RISC-V superscalar processors

[4] The Checkpoint Table stores snapshots of the RAT, and on a mispredicted-branch flush the RAT is restored from the checkpoint while physical destination registers allocated after the offending instruction are returned to the Free List. [PDF] UVM-based verification of RISC-V superscalar processors