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page table

Concept WIKI v1 · 5/28/2026

In the provided RISC-V verification context, a page table is one of the assembly-program sections generated by the riscv-dv `riscv_asm_program_gen.sv` class as part of complete randomized RISC-V assembly tests for IP verification.

Overview

In the available evidence, page table appears as a section of a generated RISC-V assembly program. The CHIPS Alliance open-source riscv-dv random instruction generator is used for RISC-V processor verification, and its riscv_asm_program_gen.sv class generates complete RISC-V assembly programs used to verify RISC-V IP.

Role in generated assembly programs

The riscv_asm_program_gen class is described as generating multiple sections of an assembly program. The listed sections include initialization routines, instruction sections, data sections, stack sections, page table, interrupt handling, and exception handling. These sections are generated by different functions in the riscv_asm_program_gen class.

Generation context

The article identifies gen_program() as the main function that generates all sections of the program by calling other functions in riscv_asm_program_gen in sequence. Within this broader flow, page-table generation is part of the assembly-program construction responsibilities attributed to the class, although the provided evidence does not describe the internal page-table layout or specific page-table generation function.

LINKED ENTITIES

1 links
riscv_asm_program_gen IMPLEMENTS

CITATIONS

3 sources
3 citations
[1] CHIPS Alliance developed the open-source riscv-dv random instruction generator for RISC-V processor verification, and `riscv_asm_program_gen.sv` generates complete RISC-V assembly programs used to verify RISC-V IP. RISC-V source class riscv_asm_program_gen, the brain behind ...
[2] The generated assembly program includes sections such as initialization routine, instruction section, data section, stack section, page table, interrupt handling, and exception handling, generated by functions in `riscv_asm_program_gen`. RISC-V source class riscv_asm_program_gen, the brain behind ...
[3] `gen_program()` is described as the main function for generating all sections of the program and as calling other `riscv_asm_program_gen` functions in sequence. RISC-V source class riscv_asm_program_gen, the brain behind ...