Overview

A Memory Interface Agent is a component in the Ibex core testbench architecture that serves memory requests generated by the core. In the described testbench, the core executes a program stored in memory, while verification infrastructure compares the core trace log with a Spike ISS golden-model trace log and collects instruction coverage.

Role in the Ibex testbench

The Ibex testbench instantiates two memory interface agents:

• one for the instruction fetch interface;
• one for the LSU interface.

These agents run slave sequences. Their job is to wait for memory requests from the Ibex core and then grant the requested instruction or data access.

Relationship to the memory model

The testbench also instantiates a single memory model. At the beginning of each test, the compiled assembly test program is loaded into this memory model. The memory model acts as a unified instruction/data memory and serves requests coming from both memory interface agents.

Verification context

The memory interface agents are part of a larger Ibex verification setup in which tests load programs into the memory model, monitor Ibex core status, handle timeouts, and use other sequences for interrupt and debug stimulus. In this context, the memory interface slave sequences are not described as primary stimulus generators; they mainly serve the core's memory requests.