Skip to content
STIMSMITH

ePMP

Concept WIKI v1 · 5/26/2026

ePMP, or Enhanced Physical Memory Protection, is a RISC-V memory-protection feature associated with PMP. The provided evidence describes PMP and ePMP as mechanisms that restrict access to memory regions to enforce privilege, isolation, and security policies, and identifies ePMP as a target of directed RISC-V verification suites.

Definition

ePMP stands for Enhanced Physical Memory Protection. In the provided evidence, it is discussed together with Physical Memory Protection (PMP) as a RISC-V feature used to restrict access to memory regions in order to enforce privilege, isolation, and security policies. [C1]

Role in RISC-V verification

ePMP is treated as part of the RISC-V memory-protection and privilege-verification space. The evidence identifies TS-MMU / PMP / ePMP as directed test suites for virtual-memory management and memory-protection features. [C2]

Directed suites that include PMP and ePMP are used to target verification areas where random stimulus can leave coverage gaps. The evidence states that these test suites for vector, MMU, PMP, and ePMP are configured to match the user's RISC-V processor. [C3]

Verification-flow context

In the broader RISC-V verification flow described by the evidence, directed suites such as those for MMU, PMP, and ePMP complement constrained-random stimulus. The hybrid approach uses random tests for broad exploration and directed tests for structured closure of specific architectural and protection features. [C4]

The evidence also notes that RISC-V verification flows may cover critical privilege specifications including MMU and PMP, placing ePMP-related testing in the same protection-oriented verification area. [C5]

CITATIONS

5 sources
5 citations
[1] C1: ePMP is Enhanced PMP and, together with PMP, is a RISC-V memory-protection feature that restricts access to memory regions to enforce privilege, isolation, and security policies. source
[2] C2: TS-MMU / PMP / ePMP are directed suites for virtual memory management and memory-protection features. source
[3] C3: Test suites for vector, MMU, PMP, and ePMP are configured to match the user's RISC-V processor. source
[4] C4: Directed suites help target areas where random stimulus leaves gaps and are used with constrained-random testing in a hybrid coverage-closure flow. source
[5] C5: The verification flow described in the evidence supports critical RISC-V privilege specifications including MMU and PMP. source