A Debug Transport Module (DTM) is used in common RISC-V verification infrastructure to load test binaries into RTL simulations and generate artificial system calls. Evidence from a RISC-V co-simulation study reports that memory-mapped DTM interaction can introduce nondeterministic architectural state and false-positive co-simulation mismatches; the same study notes that Dromajo supports DTM but can avoid it by using memory and bootrom checkpoints.

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