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code-based test generation

Concept WIKI v1 · 5/31/2026

Code-based test generation is a path-oriented test generation approach for functional processor descriptions that analyzes control flow and uses constraint solving to compute concrete test vectors.

code-based test generation

Code-based test generation, as described in the cited work on processor validation, is an automatic test generation method for functional processor descriptions. It analyzes the control flow of the description and uses constraint solving to compute test vectors that exercise execution paths.

Motivation

The method is presented for validation of microprocessor functional models. In the paper, these simulation models are treated as important development and verification artifacts, and their quality is described as capable of strongly affecting project timing.

Core idea

For a program P, the global variable definitions denote the input values of the description. A test vector is treated as a pair <v, P(v)>, where v assigns the inputs and P(v) gives the expected outputs.

Because the processor descriptions are largely composed of decoding logic, with many branches and switch statements on codeop, the methodology adopts a path coverage criterion. The paper explicitly states that path coverage is the closest quantitative approximation of test quality in this context.

Method

The strategy is split into two phases:

  1. Generate one constraint store for each path in the description.
  2. Analyze or solve that store to generate concrete values for the test vector corresponding to that path.

The implementation described in the paper uses the STTVC toolchain. It translates descriptions written in the x language into a C "code explorer" linked with the STCS solver library. The translation step is described as a purely static analysis, mainly involving type analysis.

Role of constraint solving

The approach is explicitly based on constraint solving techniques. The paper also states that the dedicated solver is designed to handle constraints arising from constructs typical of processor descriptions, and discusses constraints related to expressions, bit manipulations, and array management.

Literature context

The concept is the central method presented in Code-based Test Generation for Validation of Functional Processor Descriptions.

CITATIONS

7 sources
7 citations
[1] Code-based test generation is presented as an automatic method for generating high-quality test suites for microprocessor functional model validation by analyzing control flow and generating tests for each path using constraint solving. Code-based Test Generation for Validation of Functional Processor Descriptions
[2] The paper treats functional simulation models as important development and verification artifacts, and states that their quality can drastically affect project timing. Code-based Test Generation for Validation of Functional Processor Descriptions
[3] In the methodology, global variable definitions denote the input values, and a test vector is viewed as the pair <v, P(v)> where v contains input values and P(v) contains expected output values. Code-based Test Generation for Validation of Functional Processor Descriptions
[4] Because processor descriptions mainly contain decoding statements with many branches and switch instructions on codeop, the method adopts path coverage as the closest quantitative approximation of test quality in this context. Code-based Test Generation for Validation of Functional Processor Descriptions
[5] The strategy is decomposed into two phases: generating as many constraint stores as paths in the description, and then analyzing those stores to generate the corresponding test-vector values. Code-based Test Generation for Validation of Functional Processor Descriptions
[6] The STTVC tool translates descriptions in the x language into a C code explorer linked to the STCS solver library, and this translation is described as a purely static analysis mainly involving type analysis. Code-based Test Generation for Validation of Functional Processor Descriptions
[7] The approach relies on a dedicated constraint solver for processor-description constructs, and the paper discusses constraints associated with expressions, bit manipulations, and array management. Code-based Test Generation for Validation of Functional Processor Descriptions