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BDD Solver

Concept

The BDD Solver is a constraint-solver mode in which the solver elaborates the entire solution space for a randomize call before selecting a solution. This can consume significant memory and time up front, but the elaborated solution space is cached, making the approach effective when the same manageable randomize problem is repeated many times, such as in CPU opcode generation.

First seen 5/28/2026
Last seen 5/31/2026
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Wiki v1

WIKI

Overview

The BDD Solver is a constraint-solving mode described in the context of VCS constrained-random stimulus generation. In this mode, the solver elaborates the entire solution space of a randomize call before selecting a solution. This up-front solution-space elaboration can take significant time and memory, but the solution space is cached to accelerate later randomization calls of the same form.

Performance characteristics

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RELATIONSHIPS

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Solution Space Elaboration uses → 95% 2e
The BDD solver uses solution space elaboration to enumerate all possible solutions before selecting one.
VCS Constraint Profiler ← uses 85% 1e
The VCS Constraint Profiler provides memory details particularly useful when the BDD solver is used.
RACE Solver compares with → 95% 1e
The BDD solver and RACE solver are compared in terms of runtime and memory performance.
CPU Opcode Generation ← uses 90% 1e
The BDD solver works well for CPU opcode generation as the same randomize call often occurs many times.
Synopsys VCS ← implements 1e
Synopsys VCS implements a BDD solver mode for constraint resolution.

CITATIONS

6 sources
6 citations — click to expand
[1] In BDD mode, the solver elaborates the entire solution space of a randomize call before selecting a solution, and the elaborated solution space is cached for subsequent randomization calls. Generating AMD microcode stimuli using VCS constraint solver
[2] Solution-space elaboration in BDD solving can take significant memory and time. Generating AMD microcode stimuli using VCS constraint solver
[3] The BDD solver works well for specific architectures when the randomization problem does not take excessive memory and the same randomize call occurs many times, as in CPU opcode generation. Generating AMD microcode stimuli using VCS constraint solver
[4] In the cited opcode-generation comparison, a multiple-class architecture was faster with both the default RACE solver and the BDD solver, with reported speedups of 4x for RACE and 2x for BDD. Generating AMD microcode stimuli using VCS constraint solver
[5] The study measured memory results for the BDD solver because RACE memory consumption was typically smaller and not a limiting factor. Generating AMD microcode stimuli using VCS constraint solver
[6] The multiple-class implementation reduced the active constraint problem; the study reports 7x fewer constraints than the original implementation, improving solver efficiency. Generating AMD microcode stimuli using VCS constraint solver