RACE Solver

Concept

RACE Solver is described in the provided VCS constraint-solver case study as the default solver used for constrained-random randomization. In that study, a multiple-class opcode-generation architecture produced a 4× runtime speedup with RACE, and RACE memory usage was characterized as typically smaller and not the limiting factor compared with BDD-based solving.

First seen 5/28/2026

Last seen 5/31/2026

Evidence 1 chunks

Wiki v1

WIKI

Overview

RACE Solver is identified in the VCS constraint-solver case study as the default RACE solver used for constrained-random randomization. The study compares RACE with a BDD solver while evaluating alternative architectures for generating x86 opcode stimuli.

Performance behavior in the case study

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RELATIONSHIPS

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VCS Constraint Profiler ← uses 85% 1e

The VCS Constraint Profiler evaluates performance using the RACE solver as well.

BDD Solver ← compares with 95% 1e

The BDD solver and RACE solver are compared in terms of runtime and memory performance.

Synopsys VCS ← implements 1e

Synopsys VCS implements the RACE solver as its default constraint solving mode.

LINKED ENTITIES

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VCS Constraint Profiler USES Extracted graph relationship

BDD Solver COMPARES_WITH Extracted graph relationship

CITATIONS

8 sources

8 citations — click to expand

[1] RACE is identified as the default solver in the VCS constraint-solver case study. Generating AMD microcode stimuli using VCS constraint solver

[2] The study used profile data to isolate randomize results for two opcodes and measure CPU time with both solvers in a small testbench. Generating AMD microcode stimuli using VCS constraint solver

[3] In the runtime comparison, the multiple-class architecture was faster with both solvers; RACE showed a 4× speedup and BDD showed a 2× speedup. Generating AMD microcode stimuli using VCS constraint solver

[4] RACE memory consumption was described as typically smaller and not a limiting factor in the study, so memory was measured only for the BDD solver. Generating AMD microcode stimuli using VCS constraint solver

[5] The BDD solver elaborates the entire solution space of a randomize call before selecting a solution, can require large memory, and caches the solution space for subsequent randomization calls. Generating AMD microcode stimuli using VCS constraint solver

[6] The improved implementation had 7× fewer constraints than the original, enabling more efficient solution calculation. Generating AMD microcode stimuli using VCS constraint solver

[7] Choosing the opcode category first reduced the constraint problem to category-specific constraints and improved memory and speed without sacrificing distribution or test-level control. Generating AMD microcode stimuli using VCS constraint solver

[8] VCS constraint-profile output in the study includes randomize CPU runtime, partition CPU runtime, and memory data. Generating AMD microcode stimuli using VCS constraint solver