Bare-Metal Software

Definition

In the context of the CHERI-RISC-V VP++ master's thesis, bare-metal software refers to programs executed directly on a target platform — here, the CHERI-enabled RISC-V Virtual Prototype — without an operating system mediating accesses. Such programs interact with hardware (or the VP) primitives directly, including memory-mapped I/O for peripherals and explicit stack and capability table initialization.

Role on CHERI-RISC-V VP++

Chapter 5 of the CHERI-RISC-V VP++ thesis is devoted to "Running Bare-Metal Software on CHERI-RISC-V VP++". The bare-metal examples sit between two milestones of the thesis:

1. The verified CHERI implementation produced in Chapter 4 (using the TestRIG random-testing framework), and
2. The full-scale capability-enabled operating system boot (CheriBSD) demonstrated in Chapter 6.

Bare-metal programs therefore serve as a controlled environment to:

• Demonstrate the basic principles of CHERI in practice.
• Highlight CHERI's implications on the architecture from a control-flow-oriented perspective.
• Confirm the correct implementation of the CHERI-RISC-V VP++ by exercising its capability-based memory protection on small, observable programs before moving to a full OS context.

Topics Covered with Bare-Metal Software

The chapter on bare-metal software is organized into two main parts.

CHERI-enabled RISC-V Assembly Programs (Section 5.1)

The complexity of bare-metal programs is gradually increased to expose low-level programming details introduced by CHERI:

• Initial Assembly Implementation (5.1.1): A simple assembly program is used as a starting point.
• Modifying Assembly for CHERI (5.1.2): Adaptations required to make the assembly program CHERI-aware are explained.
• Initializing the Stack Pointer (5.1.3): How the stack pointer must be set up under CHERI's capability regime.
• The Global Capability Table (5.1.4): Use of a global capability table to manage capabilities available to bare-metal code.

CHERI-enabled C Programs (Section 5.2)

The thesis then transitions to more realistic bare-metal code written in C:

• Prerequisites (5.2.1): Toolchain and configuration requirements for compiling CHERI-enabled C applications.
• Adapting Peripheral Access: Conventional techniques such as memory-mapped I/O must be adapted to ensure compatibility with CHERI's capability-based memory protection.
• Evaluating Boundary Protection (5.2.2): Experiments confirming that CHERI prevents out-of-bounds memory accesses.
• Evaluating Function Pointers (5.2.3): Experiments showing how CHERI constrains and protects function-pointer use.

Connection to Memory Protection

The bare-metal programs are used to demonstrate how CHERI prevents common memory corruption bugs at the architectural level. These small examples establish confidence in the platform's implementation and provide a foundation that the later full-OS work (CheriBSD on CHERI-RISC-V VP++) builds upon, where the same protection mechanisms are revisited in an OS context.