Automatic Test Generation

Concept

Automatic test generation (ATG) is the automated synthesis of test inputs, test cases, or test programs used to validate software systems and hardware designs. It is applied across software quality assurance (where LLMs and multi-agent pipelines like JsonATG target Java JSON libraries), automated program repair (where generated tests strengthen repair constraints via approaches such as UnsatGuided), and hardware design verification (where evolutionary search, genetic algorithms, Bayesian networks, activity monitors, and ILP produce stimuli for simulation-based verification of processors and RISC-V vector implementations, including ATG-class tools such as Yang's Vector Test Generator and the RIOS Labs Vector Test Generator).

First seen 7/9/2026

Last seen 8/7/2026

Evidence 4 chunks

Wiki v2

WIKI

Automatic Test Generation

Automatic test generation (ATG) refers to the automated construction of test inputs, test cases, or test programs used to validate the correctness of software systems or hardware designs. Because manually authored tests are costly and rarely exhaustive, ATG techniques have been developed across multiple domains including software engineering, hardware design verification, and automated program repair.

Software Quality Assurance

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NEIGHBORHOOD

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RELATIONSHIPS

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A Genetic Testing Framework for Digital Integrated Circuits ← introduces 85% 1e

The paper presents a genetic framework for automatic test generation for digital integrated circuits.

Automatic Test Program Generation: A Case Study ← introduces 90% 1e

The paper presents a case study of automatic test program generation.

Yang's Vector Test Generator ← uses 100% 1e

Yang's Vector Test Generator is an Automatic Test Generator (ATG).

RIOS Labs Vector Test Generator ← uses 100% 1e

RIOS Labs Vector Test Generator is an ATG.

LINKED ENTITIES

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Yang's Vector Test Generator USES Extracted graph relationship

RIOS Labs Vector Test Generator USES Extracted graph relationship

CITATIONS

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9 citations — click to expand

[1] Without effective ATG, developers risk introducing subtle data inconsistency bugs, compatibility issues, and security vulnerabilities that can affect large numbers of end users and cause severe financial losses. Multi-agent Assisted Automatic Test Generation for Java JSON Libraries

[2] JsonATG is a multi-agent ATG system for Java JSON libraries that uses historical bug information as seeds, a code summarization agent and a test validation agent, and agent-generated program mutation rules tailored to JJLs. Multi-agent Assisted Automatic Test Generation for Java JSON Libraries

[3] JsonATG achieved higher coverage than two state-of-the-art LLM-based test generation methods on a widely used JSON library, and with a $25 budget reported 59 bugs in fastjson (47 confirmed, 28 fixed). Multi-agent Assisted Automatic Test Generation for Java JSON Libraries

[4] The UnsatGuided approach uses automatic test generation to strengthen the repair constraint of synthesis-based repair techniques, and is effective at alleviating regression-introduction overfitting but minimally effective for incomplete-fixing overfitting due to the oracle problem. Alleviating Patch Overfitting with Automatic Test Generation: A Study of Feasibility and Effectiveness for the Nopol Repair System

[5] Functional verification has been driven by increasing design complexity as documented in the International Technology Roadmap for Semiconductors, Design Chapter (2005), motivating tools such as Genesys-Pro. Towards Automating Simulation-Based Design Verification Using ILP

[6] A range of algorithmic techniques (evolutionary/genetic search, Bayesian networks, activity monitors, and integer linear programming) have been applied to ATG for simulation-based hardware design verification. Towards Automating Simulation-Based Design Verification Using ILP

[7] Yang's Vector Test Generator is an Automatic Test Generator (ATG) developed by Yang Liu of PLCT lab that verifies the RISC-V Vector implementation, is written in GoLang with GNU Make automation, produces fully self-checking tests, and is supported on the Spike ISS and integrated with the ARA core. Open-Source RISC-V Vector Test Suites: A Comparative Analysis

[8] The RIOS Labs Vector Test Generator targets RVV v1.0, produces self-checking tests, allows users to configure parameters such as VLEN, LMUL and SEW, uses RISCV-ISAC for coverage with the Sail ISS, and is compatible with the RISCOF infrastructure. Open-Source RISC-V Vector Test Suites: A Comparative Analysis

[9] FORCE-RISCV is an Instruction Sequence Generator that uses randomization over instructions, registers, addresses, and data with advanced APIs for finer control, targeting RVV v1.0. Open-Source RISC-V Vector Test Suites: A Comparative Analysis