Automatic Test Generation

Concept

Automatic test generation (ATG) is the automated synthesis of test cases or test programs to verify software and hardware systems. It is applied across software quality assurance (where it helps detect data inconsistency bugs, compatibility issues, and security vulnerabilities) and hardware design verification (where it produces stimuli for simulation-based functional verification of processors and integrated circuits). Recent advances leverage large language models and multi-agent pipelines, while classical approaches employ evolutionary search, genetic algorithms, Bayesian networks, and integer linear programming.

First seen 7/9/2026

Last seen 7/9/2026

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Wiki v1

WIKI

Automatic Test Generation

Automatic test generation (ATG) refers to the automated construction of test inputs, test cases, or test programs used to validate the correctness of software systems or hardware designs. Because manually authored tests are costly and rarely exhaustive, ATG techniques have been developed across multiple domains including software engineering, hardware design verification, and automated program repair.

Software Quality Assurance

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RELATIONSHIPS

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A Genetic Testing Framework for Digital Integrated Circuits ← introduces 85% 1e

The paper presents a genetic framework for automatic test generation for digital integrated circuits.

Automatic Test Program Generation: A Case Study ← introduces 90% 1e

The paper presents a case study of automatic test program generation.

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A Genetic Testing Framework for Digital Integrated Circuits INTRODUCES Extracted graph relationship

Automatic Test Program Generation: A Case Study INTRODUCES Extracted graph relationship

CITATIONS

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[1] Without effective ATG, developers risk introducing subtle data inconsistency bugs, compatibility issues, and security vulnerabilities that can affect large numbers of end users and cause severe financial losses. Multi-agent Assisted Automatic Test Generation for Java JSON Libraries

[2] JsonATG is a multi-agent ATG system for Java JSON libraries that uses historical bug information as seeds, a code summarization agent, a test validation agent, and agent-generated program mutation rules tailored to JJL characteristics, with post-processing for syntactic and semantic correctness. Multi-agent Assisted Automatic Test Generation for Java JSON Libraries

[3] Existing LLM-based methods like TitanFuzz and YanHui lack specialization in the JSON domain. Multi-agent Assisted Automatic Test Generation for Java JSON Libraries

[4] JsonATG achieved higher coverage than two state-of-the-art LLM-based test generation methods on a widely used JSON library, and with a $25 budget reported 59 bugs in fastjson, of which 47 were confirmed and 28 fixed. Multi-agent Assisted Automatic Test Generation for Java JSON Libraries

[5] UnsatGuild strengthens the repair constraint of synthesis-based repair by adding automatically generated tests, and on the 224 bugs of Defects4J was effective at alleviating regression introduction but had minimal positive impact on incomplete fixing due to the oracle problem. Alleviating Patch Overfitting with Automatic Test Generation: A Study of Feasibility and Effectiveness for the Nopol Repair System

[6] Genesys-Pro introduced innovations in test program generation for functional processor verification. Towards Automating Simulation-Based Design Verification Using ILP

[7] A genetic testing framework for digital integrated circuits was introduced by Yu, Fin, Fummi, and Rudnick at ICTAI. Towards Automating Simulation-Based Design Verification Using ILP

[8] Corno, Sanchez, Reorda, and Squillero published a case study on automatic test program generation and an evolutionary test program induction method for microprocessor design verification. Towards Automating Simulation-Based Design Verification Using ILP

[9] Bose, Shin, Rudnick, Dukes, and Abadir proposed a genetic approach to automatic bias generation for biased random instruction generation. Towards Automating Simulation-Based Design Verification Using ILP

[10] Fine and Ziv described coverage directed test generation for functional verification using Bayesian networks, and Braun, Fine, and Ziv enhanced the efficiency of Bayesian-network-based coverage-directed test generation. Towards Automating Simulation-Based Design Verification Using ILP

[11] A stochastic approach to test generation via activity monitors has been pursued in the design automation literature. Towards Automating Simulation-Based Design Verification Using ILP

[12] ILP-based methods have been pursued as a route toward automating simulation-based design verification. Towards Automating Simulation-Based Design Verification Using ILP