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Addressing Modes

Concept

In computer architecture, an addressing mode specifies how the operand of a machine instruction is located in memory or in registers. Addressing modes are a key design choice in both RISC and CISC instruction sets, and complex variants appear in architectures such as PowerPC and x86. The set of modes supported by an ISA affects code size, performance, and the cost of generating memory accesses in tools such as test generators.

First seen 7/8/2026
Last seen 7/8/2026
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Addressing Modes

Definition

An addressing mode is the mechanism an instruction set architecture (ISA) uses to compute the location of an operand referenced by a machine instruction. Different addressing modes trade off generality, instruction length, and the number of memory references required to reach an operand.

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RELATIONSHIPS

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Memory Access Generation ← uses 92% 1e
Memory accesses are generated using addressing modes as part of the framework.
Complex Addressing Modes ← part of 90% 1e
Complex addressing modes are a subset of addressing modes in general.

CITATIONS

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3 citations — click to collapse
[1] Complex addressing modes in PowerPC and x86 are handled by a generic constraint-satisfaction algorithm for memory access generation. Constraint satisfaction for test program generation
[2] Addressing modes are a distinguishing characteristic compared between RISC and CISC architectures and affect code size and performance. RISC and CISC
[3] Near addressing modes allow operands (e.g., global variables in real-time control code) outside the range of short displacements to be reached directly, reducing code size and improving performance. Code size reduction by advanced near addressing modes