Overview
Access-Control Extension (ACE) is a special custom instruction set, coined in the work of the authors cited as [8] in An Engineered Minimal-Set Stimulus for Periodic Information Leakage Fault Detection on a RISC-V Microprocessor. ACE forms the software component of a predominantly software-based fault detection scheme supplemented by hardware [1].
Design and Operation
The ACE instruction set interacts with a custom-instrumented, full-scan chain to test the microprocessor (µP). Because the ACE instructions are privileged to only the ACE firmware, the implementation of the overall approach is described as complicated [1].
Documented Limitations
According to the survey portion of the RISC-V leakage-fault detection paper, ACE exhibits several drawbacks that motivated the authors to propose an alternative counter-based periodic testing methodology:
- Added µP complexity: The specialized instructions add complexity to the microprocessor [1].
- Side-channel attack vector: The custom instructions are reported to create a side-channel attack vector [1].
- No targeting of information leakage sites: The tree architecture exposed by ACE provides no avenue to specifically target information leakage sites [1].
In contrast, the proposed periodic testing method introduces only a small set of counters and utilizes standard RISC-V instructions, eliminating the need for custom instructions such as those defined by ACE [1].
Resource Overhead
ACE is used as a comparative reference point for overhead analysis on the Potato RISC-V core (area 28,510 µm²). Reported figures from Table 3 of the paper are:
| Method | Memory Allocation (KBits) | Area Overhead (%) |
|---|---|---|
| ACE | 32 | 18.7 |
| ACE Hybrid | 32 | 5.8 |
Source: [2]
The performance overhead of the proposed counter-based Counter-Measure plus Fault Trigger Binary Executable (FTBE) methodology is estimated using a checkpoint interval of 100 million instructions, akin to the ACE technique, but with a substantially smaller number of scan clock cycles (120 with five 24-bit counters) [2].
Relationship to Other Work
ACE is not the same concept as the "cryptographic access control extension" terminology used in cloud-storage cryptography research (e.g., IBBE-SGX and A-SKY); those refer to cryptographic mechanisms for collaborative encrypted data sharing, whereas ACE here refers specifically to a custom ISA extension used for microprocessor self-test. ACE is compared against in the periodic stimulus / FTBE work on the Potato RISC-V core [59c3e67a-be12-4e7e-bd04-ee7ef21ad45e, ac6521ab-b73a-46ad-b7e2-031f113997f4].