x86
ToolThe x86 microprocessor family is a widely deployed instruction set architecture whose hardware implementations require rigorous functional verification. In documented verification work, an x86 design was used as a target for the Genesys pseudo-random test-program generator methodology, which aimed to expose design bugs such as those historically associated with the Pentium floating-point units.
First seen 6/9/2026
Last seen 6/9/2026
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x86
Overview
x86 denotes a family of microprocessor designs implementing the Intel-derived CISC instruction set architecture. The family has a long history of commercial deployment and, as with any complex processor design, demands thorough functional verification to ensure correctness before fabrication.
NEIGHBORHOOD
2 nodes · 1 edgesgraph · x86 · depth=1
RELATIONSHIPS
1 connectionsGenesys was applied to evaluate and verify an x86 design.
LINKED ENTITIES
1 linksCITATIONS
4 sources4 citations — click to collapse
[1] An x86 design was used as the target application of a functional verification methodology built around the Genesys automatic pseudo-random test-program generator. Functional verification methodology for microprocessors using the Genesys test-program generator. Application to the x86 microprocessors family for DATE 1999 - IBM Research
[2] The Genesys-based verification methodology relies on a verification plan that induces smart sets of tests to carry out the verification tasks. Functional verification methodology for microprocessors using the Genesys test-program generator. Application to the x86 microprocessors family for DATE 1999 - IBM Research
[3] The authors argued that this plan-driven verification methodology could have helped to avoid known escape bugs in x86-family processors, such as the two infamous Pentium Floating Point bugs. Functional verification methodology for microprocessors using the Genesys test-program generator. Application to the x86 microprocessors family for DATE 1999 - IBM Research
[4] The work was published by IBM Research in 1999 and presented at DATE 1999 (© 1999 IEEE). Functional verification methodology for microprocessors using the Genesys test-program generator. Application to the x86 microprocessors family for DATE 1999 - IBM Research