Questa RTL Simulator
ToolFirst seen 8/13/2026
Last seen 8/13/2026
Evidence 2 chunks
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2 connections UVM-based Verification of a RISC-V Processor Core Using a Golden Predictor Model and a Configuration Layer ← uses 100% 2e
The paper uses Questa RTL simulator for RTL simulation of the RISC-V processor.
Questa RTL Simulator is a product of Mentor, A Siemens Business.