e500 Processor Model (FSM)
ToolFirst seen 7/3/2026
Last seen 7/3/2026
Evidence 2 chunks
NEIGHBORHOOD
No graph connections found for this entity yet. It may appear in future ingestion runs.
explore full graph →RELATIONSHIPS
2 connections Specification-based Compaction of Directed Tests for Functional Validation of Pipelined Processors ← evaluates 100% 2e
The paper evaluates its test compaction methodology on an e500 processor FSM model.
The e500 processor model is implemented as an FSM for test generation purposes.