Overview

Recurrent neural network-based constraint alteration is a technique proposed for simulation-based verification of processors. In the described verification flow, stimuli are generated by pseudorandom generators (PRGs), applied to processor inputs, and evaluated by monitoring achieved functional coverage to judge verification completeness.[C1]

The technique dynamically alters PRG constraints through a recurrent neural network (RNN). The RNN receives coverage feedback from simulation of the design under verification and uses that feedback in the constraint-alteration process.[C2]

Verification setting

The evidence describes processor stimuli as taking multiple forms. Examples include bit vectors applied to processor input ports and programs loaded directly into program memory.[C3] The technique is therefore positioned around simulation stimulus generation rather than static analysis or formal proof.

Demonstration and applicability

For demonstration, the authors used processors provided by Codasip. The stated reason was that their coverage state space is reasonably large and differs across processor kinds.[C4] The authors also state that the techniques presented are widely applicable.[C5]

Reported effects

The reported experimental results indicate two outcomes: coverage closure is achieved much sooner, and a small set of high-coverage stimuli can be isolated for use in regression tests.[C6]

Source

The technique is described in the arXiv paper "Automation of Processor Verification Using Recurrent Neural Networks", listed as arXiv:1803.09810 / arXiv:1803.09810v1.[C7]