Assembly-level test program generation
TechniqueAssembly-level test program generation is a verification technique that automatically synthesizes test programs in assembly language for functional verification of microprocessors. It relies on formal specifications of the target architecture to describe verification goals and produces tests that exercise specific microarchitectural situations, enabling coverage-directed validation of instruction set behavior.
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Overview
Assembly-level test program generation is an automated verification technique used to produce test programs written in the assembly language of a target microprocessor. These generated programs are then executed (typically on a simulation model or the hardware itself) to check functional correctness of the processor against its specification.
The technique addresses the difficulty of manually authoring assembly-level stimulus that systematically covers instruction behaviors, addressing modes, operand combinations, and interactions between instructions. By automating program synthesis from formal specifications, the technique supports coverage-directed functional verification of complex instruction set architectures.
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