Overview

Polychronis Xekalakis is listed as an author of the 2021 paper “Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation”. In the paper’s author block, Xekalakis is associated with Nvidia in Portland, Oregon, and the email address pxekalakis@nvidia.com is provided. [C1]

Research publication

Xekalakis co-authored “Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation” with Nursultan Kabylkas, Tommy Thorn, Shreesha Srinath, and Jose Renau. The ACM reference format in the paper identifies the publication as appearing at The 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-54) in 2021. [C2]

The paper addresses RISC-V processor verification. Its abstract presents tools intended to help verification engineers expose bugs before production and improve productivity in debugging, test creation, and simulation. It introduces Logic Fuzzer (LF), described as a tool that expands verification-space exploration without adding new verification tests, and Dromajo, described as a RISC-V processor verification framework and RV64GC emulator designed for co-simulation. [C3]