Peter Rugg
PersonPeter Rugg is listed as a co-author of the 2023 IEEE Design & Test paper "Randomized Testing of RISC-V CPUs using Direct Instruction Injection," which presents TestRIG, a randomized testing framework for RISC-V implementations.
First seen 5/27/2026
Last seen 6/9/2026
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Overview
Peter Rugg is identified in the available evidence as a co-author of the paper "Randomized Testing of RISC-V CPUs using Direct Instruction Injection". The paper appears in IEEE Design & Test in 2023 and lists Peter Rugg among its authors alongside Alexandre Joannou, Jonathan Woodruff, Franz A. Fuchs, Marno van der Maas, Matthew Naylor, Michael Roe, Robert N. M. Watson, Peter G. Neumann, and Simon W. Moore. [C1]
Associated work
NEIGHBORHOOD
2 nodes · 1 edgesgraph · Peter Rugg · depth=1
RELATIONSHIPS
2 connectionsPeter Rugg is listed as an author of the paper.
Peter Rugg is listed as an author of the paper.
CITATIONS
4 sources4 citations — click to collapse
[1] Peter Rugg is listed as a co-author of the paper "Randomized Testing of RISC-V CPUs using Direct Instruction Injection" in IEEE Design & Test, 2023. Randomized Testing of RISC-V CPUs using Direct
[2] The paper describes TestRIG as a testing framework for RISC-V implementations that uses random instruction sequences and tandem execution to compare a formal model with an implementation under test. Randomized Testing of RISC-V CPUs using Direct
[3] The paper describes Direct Instruction Injection as providing the next instruction from the test harness regardless of the CPU program counter. Randomized Testing of RISC-V CPUs using Direct
[4] The paper reports that TestRIG was used to test many standard RISC-V extensions and the experimental CHERI security extension, and that it improved coverage and detected issues in instruction semantics, the pipeline, and data caches. Randomized Testing of RISC-V CPUs using Direct