Michael Bedford Taylor
PersonMichael Bedford Taylor is listed as a University of Washington Department of ECE co-author of the paper "ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance," which presents a CSR-transition-guided processor fuzzing approach for RTL verification.
First seen 5/28/2026
Last seen 6/8/2026
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Overview
Michael Bedford Taylor is identified in the available evidence as an author affiliated with the Department of ECE at the University of Washington. He is listed as a co-author of "ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance" alongside Sadullah Canakci, Chathura Rajapaksha, Leila Delshadtehrani, Anoop Nataraja, Manuel Egele, and Ajay Joshi.
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3 connectionsMichael Bedford Taylor is listed as an author of the ProcessorFuzz paper.
Michael Bedford Taylor is affiliated with University of Washington.
Michael Bedford Taylor is listed as an author of the paper.
CITATIONS
5 sources5 citations — click to expand
[1] Michael Bedford Taylor is listed as an author affiliated with the Department of ECE, University of Washington, on the ProcessorFuzz paper. ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance
[2] ProcessorFuzz is presented as a processor fuzzer for RTL verification that uses a CSR-transition coverage metric and monitors Control and Status Register transitions to guide exploration of processor states. ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance
[3] ProcessorFuzz was evaluated on Rocket, BOOM, and BlackParrot and triggered ground-truth bugs 1.23× faster on average than DIFUZZRTL. ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance
[4] The ProcessorFuzz experiments exposed eight new bugs across three RISC-V cores and one new bug in a reference model, and all nine bugs were confirmed by the relevant project developers. ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance
[5] The paper frames hardware fuzzing challenges around the mismatch between software coverage metrics and hardware verification, and the fact that processor bugs may not produce an observable crash-like anomaly. ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance