Marno van der Maas
PersonMarno van der Maas is listed as a co-author of the IEEE Design & Test 2023 paper "Randomized Testing of RISC-V CPUs using Direct Instruction Injection," which describes TestRIG, a randomized testing framework for RISC-V implementations using Direct Instruction Injection.
First seen 5/27/2026
Last seen 6/9/2026
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Overview
Marno van der Maas is a co-author of the paper "Randomized Testing of RISC-V CPUs using Direct Instruction Injection", published in IEEE Design & Test in 2023. The author list includes Alexandre Joannou, Peter Rugg, Jonathan Woodruff, Franz A. Fuchs, Marno van der Maas, Matthew Naylor, Michael Roe, Robert N. M. Watson, Peter G. Neumann, and Simon W. Moore. [C1]
Associated technical work
NEIGHBORHOOD
2 nodes · 1 edgesgraph · Marno van der Maas · depth=1
RELATIONSHIPS
1 connectionsMarno van der Maas is listed as an author of the paper.
CITATIONS
4 sources4 citations — click to collapse
[1] Marno van der Maas is a co-author of the paper "Randomized Testing of RISC-V CPUs using Direct Instruction Injection," published in IEEE Design & Test in 2023. Randomized Testing of RISC-V CPUs using Direct Instruction Injection
[2] The paper describes TestRIG as a testing framework for RISC-V implementations that generates random instruction sequences, executes them on a model and implementation under test, and compares execution traces. Randomized Testing of RISC-V CPUs using Direct Instruction Injection
[3] Direct Instruction Injection provides the next instruction from the test harness rather than fetching it from program memory at an address determined by the CPU program counter. Randomized Testing of RISC-V CPUs using Direct Instruction Injection
[4] The paper states that TestRIG was used to test standard RISC-V extensions and the experimental CHERI security extension, and that it replaced the authors' instruction-set-level unit testing for development. Randomized Testing of RISC-V CPUs using Direct Instruction Injection