Overview

Jose Renau is a researcher affiliated with UC Santa Cruz in Santa Cruz, California. In the cited MICRO-54 paper, he is listed with the email address renau@ucsc.edu and the affiliation UC Santa Cruz.

Publications

Renau is listed as a co-author of “Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation,” a 2021 paper presented at The 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-54). The paper’s ACM reference lists the authors as Nursultan Kabylkas, Tommy Thorn, Shreesha Srinath, Polychronis Xekalakis, and Jose Renau.

The paper presents tools for RISC-V processor verification, including Logic Fuzzer (LF) and Dromajo. According to the abstract, Logic Fuzzer expands verification-space exploration by randomizing design-under-test states or control signals at points that do not affect functionality, while Dromajo is described as an RV64GC emulator designed for co-simulation purposes.