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Chathura Rajapaksha

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Chathura Rajapaksha is listed as a Boston University ECE co-author of the paper “ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance,” which presents a CSR-transition-coverage-guided fuzzer for RTL processor verification.

First seen 5/28/2026
Last seen 6/8/2026
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Overview

Chathura Rajapaksha is listed as a co-author of “ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance.” In the author block of that paper, Rajapaksha is associated with the Department of ECE, Boston University and the email address chath@bu.edu.[C1]

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RELATIONSHIPS

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ProcessorFuzz paper ← authored by 100% 2e
Chathura Rajapaksha is listed as an author of the ProcessorFuzz paper.
Boston University part of → 100% 1e
Chathura Rajapaksha is affiliated with Boston University.
Chathura Rajapaksha is listed as an author of the paper.
Chathura Rajapaksha is listed as an author of the paper.

CITATIONS

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[1] Chathura Rajapaksha is listed as a co-author of “ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance” and is associated in the paper author block with the Department of ECE, Boston University and the email address chath@bu.edu. ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance
[2] ProcessorFuzz is presented as a processor fuzzer for RTL verification that uses a CSR-transition coverage metric; the paper states that CSRs control and hold processor state and that CSR transitions indicate new processor states. ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance
[3] The ProcessorFuzz paper reports evaluation on Rocket, BOOM, and BlackParrot; it states that ProcessorFuzz triggered ground-truth bugs 1.23× faster on average than DIFUZZRTL, exposed eight new bugs across the three RISC-V cores, and found one new bug in a reference model, with all nine confirmed by project developers. ProcessorFuzz: Processor Fuzzing with Control and Status Registers Guidance