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MA2TG: A Functional Test Program Generator for Microprocessor Verification

Paper
First seen 7/3/2026
Last seen 7/3/2026
Evidence 2 chunks

NEIGHBORHOOD

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RELATIONSHIPS

13 connections
Graph-based Functional Test Program Generation mentions → 95% 2e
The paper references graph-based functional test program generation for pipelined processors.
EXPRESSION mentions → 95% 2e
The paper cites EXPRESSION as an architecture description language tool.
Danni Zhu authored by → 100% 1e
Danni Zhu is listed as an author of the paper.
Yang Guo authored by → 100% 1e
Yang Guo is listed as an author of the paper.
Gongjie Liu authored by → 100% 1e
Gongjie Liu is listed as an author of the paper.
Sikun Li authored by → 100% 1e
Sikun Li is listed as an author of the paper.
National University of Defense Technology published by → 95% 1e
All authors are affiliated with the National University of Defense Technology.
AVPGEN mentions → 95% 1e
The paper cites AVPGEN as a related test generator for architecture verification.
BNF-based Test Program Generation mentions → 95% 1e
The paper references a BNF-based automatic test program generator as related work.
Constraint Satisfaction-based Test Generation mentions → 95% 1e
The paper references work on using constraint satisfaction for random test program generation.
MA2TG introduces → 100% 1e
The paper presents MA2TG as its primary contribution.
PowerPC Processor Verification mentions → 95% 1e
The paper cites work on test program generation for functional verification of PowerPC processors.
Tun Li authored by → 100% 1e
Tun Li is listed as a corresponding author of the paper.