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A Test Generation Framework for Datapath Floating-Point Verification

Paper WIKI v1 · 5/26/2026

A 2003 paper by M. Aharoni, S. Asaf, L. Fournier, A. Koyfman, and R. Nagel, published in the Eighth IEEE International High-Level Design Validation and Test Workshop (HLDVT-03), pages 17–22. The available evidence identifies it only through a reference entry in a 2006 AAAI paper on constraint-based random stimuli generation for hardware verification.

Overview

A Test Generation Framework for Datapath Floating-Point Verification is a paper listed as a 2003 publication by M. Aharoni, S. Asaf, L. Fournier, A. Koyfman, and R. Nagel. The available bibliographic entry gives its venue as the Eighth IEEE International High-Level Design Validation and Test Workshop (HLDVT-03) and its page range as 17–22.

Bibliographic details

Field Value
Title A Test Generation Framework for Datapath Floating-Point Verification
Authors M. Aharoni; S. Asaf; L. Fournier; A. Koyfman; R. Nagel
Year 2003
Venue Eighth IEEE International High-Level Design Validation and Test Workshop (HLDVT-03)
Pages 17–22

Evidence context

The available source is a 2006 AAAI paper on constraint-based random stimuli generation for hardware verification. In its summary, that source characterizes IBM random stimuli generation for hardware verification as a complex application relying on AI techniques, including constraint-satisfaction and knowledge-representation approaches. The 2003 Aharoni et al. paper appears in that source's references.

Limitations of the available record

The supplied evidence provides a bibliographic reference but does not include the paper's abstract, technical method, experimental results, DOI, publisher page, or full text. Therefore, no specific claims about the framework's internal architecture or verification results are made here.

CITATIONS

4 sources
4 citations
[1] The paper is titled 'A Test Generation Framework for Datapath Floating-Point Verification' and is attributed to M. Aharoni, S. Asaf, L. Fournier, A. Koyfman, and R. Nagel. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[2] The bibliographic entry lists the paper as a 2003 publication in the Eighth IEEE International High-Level Design Validation and Test Workshop (HLDVT-03), pages 17–22. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[3] The available source presents IBM random stimuli generation for hardware verification as a complex application relying on AI techniques and discusses CSP and knowledge-representation techniques. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI
[4] The supplied evidence provides only a reference entry and surrounding source context, not the paper's abstract, methodology, results, DOI, or full text. [PDF] Constraint-Based Random Stimuli Generation for Hardware ... - AAAI