Bluespec

Organization

Bluespec is an organization that provides commercially available RISC-V processor designs, including the RV32I.MCU.AXI4.DM MCU core. Bluespec's RISC-V cores have been used as reference designs in verification methodologies combining Google RISCV-DV with UVM functional coverage, and in flows involving Synopsys VCS, Verdi, and the Verdi Hardware/Software Debug solution. Synopsys also publishes a Verification Reference Cookbook based on Bluespec's RV32I.MCU.AXI4.DM core.

First seen 6/10/2026

Last seen 7/4/2026

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Bluespec

Overview

Bluespec is an organization that supplies commercially available RISC-V processor designs. Evidence focuses on its role as a RISC-V core vendor whose designs have been used as the verification target in industry white papers and methodology guides.

RISC-V MCU Core

Bluespec offers a microcontroller-class RISC-V processor core identified as RV32I.MCU.AXI4.DM. This core combines the RV32I base integer instruction set with MCU-oriented features, an AXI4 interface, and a Debug Module (DM). It is referenced as a commercially available Bluespec MCU core used in verification case studies and reference methodologies.

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NEIGHBORHOOD

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RELATIONSHIPS

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Charlie Hauck ← part of 99% 1e

Charlie Hauck is CEO at Bluespec.

Bipul Talukdar ← part of 100% 1e

Bipul Talukdar is Senior Director of Application Engineering at Bluespec.

Bluespec MCU RTL core ← authored by 100% 1e

Bluespec provides the MCU RTL core.

Synopsys compares with → 80% 1e

Synopsys and Bluespec are collaborating on defining RISC-V ISA coverage methodology.

CITATIONS

6 sources

6 citations — click to expand

[1] Bluespec provides a commercially available RISC-V MCU core identified as RV32I.MCU.AXI4.DM. [PDF] Understanding UVM Coverage for RISC-V Processor Designs

[2] The Synopsys Verdi HW/SW Debug solution proved useful during Bluespec MCU verification by providing more visibility into generated RISC-V instructions, especially when debugging constrained-random sequences. [PDF] Understanding UVM Coverage for RISC-V Processor Designs

[3] Synopsys provides a Verification Reference Cookbook for Bluespec RISC-V processors built around Bluespec's RV32I.MCU.AXI4.DM core. [PDF] Understanding UVM Coverage for RISC-V Processor Designs

[4] A white paper explains UVM functional coverage for RISC-V cores using the Google RISCV-DV open-source project and targets Bluespec RISC-V cores. Universal Verification Methodology Coverage for Bluespec RISC-V Cores (SemiEngineering)

[5] The methodology demonstrated on the Bluespec MCU core combines RISCV-DV with a UVM-compliant functional coverage model and merges functional and code coverage using Synopsys VCS and Verdi. [PDF] Understanding UVM Coverage for RISC-V Processor Designs

[6] A limitation of the approach demonstrated on the Bluespec MCU is requiring two testbenches (functional and code coverage), with future work intended to integrate them into a single testbench. [PDF] Understanding UVM Coverage for RISC-V Processor Designs