Overview

OpenHW is an organization referenced in a paper on functional verification of a RISC-V vector accelerator. In the paper's discussion of the open-source RISC-V ecosystem, OpenHW is cited as one of the groups contributing verification environments for multiple processor designs, including Parallel Ultra Low Power (PULP) designs such as RI5CY, Ariane, and Ibex.^[1]

Verification context

The cited paper frames OpenHW's work in the broader context of RISC-V verification. It describes the authors' own accelerator-verification infrastructure as using a UVM environment, co-simulation against Spike as a reference model, constrained-random test generation, simulation, error reporting, and CI/CD automation.^[2] OpenHW is mentioned as an example of an open-source RISC-V community group that has developed verification environments for existing designs.^[1]

Related concepts

• UVM: The paper uses UVM as part of its own RISC-V vector-accelerator verification approach and discusses OpenHW in the same broader verification ecosystem.^[2]

^[1]: OpenHW is cited as a group that has designed and developed verification environments for designs including RI5CY, Ariane, and Ibex. ^[2]: The same paper describes a UVM-based verification infrastructure for a RISC-V vector accelerator.