UVM Virtual Sequence

Concept

A UVM virtual sequence coordinates interface-specific stimulus and reactions across multiple UVM agents. In the cited RISC-V vector processor verification environment, virtual sequences generate transactions for sub-interfaces, receive observed interface state through monitors and sequencers, and use UVM events to synchronize communication among dependent sub-interfaces.

First seen 5/27/2026

Last seen 5/27/2026

Evidence 1 chunks

Wiki v1

WIKI

Overview

A UVM virtual sequence is used in a UVM verification environment to coordinate stimulus across multiple interfaces or sub-interfaces. In the cited RISC-V Vector Processing Unit (VPU) verification setup, each virtual sequence creates interface-specific transactions that are sent to the corresponding interface agent.^[1]

The environment described in the evidence used the Universal Verification Methodology (UVM) because it supports modular, scalable, and reusable verification environments.^[2]

READ FULL ARTICLE →

NEIGHBORHOOD

No graph connections found for this entity yet. It may appear in future ingestion runs.

explore full graph →

RELATIONSHIPS

1 connections

Functional Verification of a RISC-V Vector Accelerator ← uses 98% 1e

UVM virtual sequences coordinate stimulus generation across sub-interfaces

LINKED ENTITIES

1 links

Functional Verification of a RISC-V Vector Accelerator USES Extracted graph relationship

CITATIONS

8 sources

8 citations — click to expand

[1] The cited verification environment used UVM because it supports modular, scalable, and reusable verification environments. different

[2] Each virtual sequence creates interface-specific transactions that are sent to the corresponding interface. different

[3] The VPU verification environment created one agent for each sub-interface, and each agent contained a sequencer, a driver, and a monitor connected to the virtual interface. different

[4] When a driver receives a transaction, it stimulates the corresponding sub-interface using the incoming transaction values. different

[5] Because the virtual sequence does not know when a transaction is driven, a monitor captures interface state and sends it back to the virtual sequence through the sequencer; the virtual sequence then reacts and can produce new stimulus. different

[6] The environment used UVM events to synchronize seven communicating sub-interfaces and to ease virtual-sequence intercommunication. different

[7] Due to dependency among sub-interfaces, the VPU verification randomized only instructions fed to the issue sub-interface, while other sub-interfaces reacted according to the driven instructions. different

[8] After an instruction was fed through the issue agent, the UVM flow observed or stimulated DISPATCH and COMPLETED interfaces as part of instruction execution tracking. different