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stuck-at-fault

Concept WIKI v1 · 5/26/2026

A stuck-at-fault is a circuit-level fault model used in implementation-based testing. In the provided microprocessor testing case study, stuck-at-fault analysis is described as modifying a circuit design with mutators that represent fabrication faults, such as broken wires between gates. The technique is effective for medium-size circuits and uses design structure to build equivalence-class tests, but it may miss higher-level design flaws such as memory write-read errors involving byte alignment.

Definition

A stuck-at-fault is a fault-analysis concept used at the circuit-design level. The provided source describes stuck-at-faults as a common analysis technique in which a given circuit design—an implementation—is modified by mutators that capture a fabrication fault model. An example fault model is that one or more wires connecting gates in the circuit are broken. [Definition and fault model]

Testing characterization

The source characterizes stuck-at-fault analysis as conceptually similar to a white-box mutation technique, because the testing activity modifies or reasons over the structure of the implementation. As an implementation-based testing method, it has the corresponding advantages and drawbacks when compared with specification-based approaches. [White-box and implementation-based characterization]

Effectiveness

Stuck-at-fault techniques are described as very effective for medium-size circuits. They use the structure of the given design to construct equivalence-class tests that directly incorporate a fault model. [Effectiveness for medium-size circuits]

Limitations

The same source notes that this kind of testing will not reveal certain design flaws, giving as an example a write-read error under the influence of byte alignments in memory. [Limitation: design-level flaws]

Context in microprocessor test generation

In the cited VAMP microprocessor case study, the authors state that they had a VAMP gate-level model and could have selected a testing technique at that level, but instead chose to stay at the design level of the VAMP machine. They also note that equivalence classes could be refined further by exploring byte-level or bit-level representations of registers and memory cells. [VAMP testing-methodology context]

CITATIONS

5 sources
5 citations
[2] White-box and implementation-based characterization Test Program Generation for a Microprocessor: A Case Study
[3] Effectiveness for medium-size circuits Test Program Generation for a Microprocessor: A Case Study