reference model comparison
ConceptReference model comparison is a processor verification technique that runs code on both an implementation and a high-level golden model, then checks whether their architectural states or execution traces agree. It can be implemented as end-of-simulation comparison, trace comparison, or co-simulation, with co-simulation addressing asynchronous stimuli such as interrupts by coordinating the implementation and reference model during execution.
WIKI
Overview
Reference model comparison is a verification technique for processors in which the execution of an implementation is compared against a reference, or golden, model. In the cited MICRO-54 paper, the reference model is described as a high-level software model of a processor that is fast, uncomplicated, omits implementation details, and updates architectural state at instruction-level granularity. The core idea is that when the same code runs on the device under test (DUT) and the model, their architectural states should match at any given moment. [C1]
This technique is useful in settings where self-checking is difficult. For randomly generated verification code, the paper notes that self-checking techniques are not applicable because of the random nature of the tests; instead, pass/fail behavior can be determined by comparing execution with a reference model. [C2]
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