phase analysis

Concept

Phase analysis is used in processor simulation and verification to identify representative execution phases and pair them with simulation points or checkpoints, allowing long-running programs to be verified by loading selected representative states rather than replaying entire executions.

First seen 5/27/2026

Last seen 5/28/2026

Evidence 1 chunks

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WIKI

Overview

In the processor-verification context represented by the provided evidence, phase analysis refers to identifying important or representative phases of a program execution so they can be captured as simulation points and used with checkpoints. The cited MICRO 2021 paper describes checkpointing as a way to avoid repeatedly replaying long execution sequences, such as Linux boot, and notes that checkpoints can apply phase-analysis and simulation-point concepts to capture important phases in a portable format.

Use with checkpoints and simulation points

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RELATIONSHIPS

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Dromajo ← uses 90% 2e

Dromajo supports phase analysis concepts for checkpoint generation at simulation points.

checkpoint ← uses 85% 1e

Checkpoints can leverage phase analysis to identify representative simulation points.

LINKED ENTITIES

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Dromajo USES Extracted graph relationship

simulation points RELATED_TO The evidence explicitly pairs phase analysis with simulation points as a way to capture important program phases in a portable format.

CITATIONS

6 sources

6 citations — click to expand

[1] In processor verification, phase analysis is used with simulation points to capture important program phases in checkpoint form. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation

[2] Checkpointing long-running programs can reduce simulation cost by allowing parallel execution and avoiding repeated replay of long sequences such as Linux boot. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation

[3] The cited workflow suggests co-simulating SPEC benchmarks faster by loading simulation points that represent different program phases. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation

[4] Dromajo is integrated into the described verification flow as a shared library linked to a simulator and accessed from Verilog through DPI wrapper calls. [PDF] Effective Processor Verification with Logic Fuzzer Enhanced Co-simulation

[5] The phrase two-phase analysis is also used in security-protocol research for knowledge-flow analysis. A Generalized Two-Phase Analysis of Knowledge Flows in Security Protocols

[6] A separate web-application security paper uses a two-phase abstract-interpretation approach to derive static analysis from runtime protection. Deriving Static Security Testing from Runtime Security Protection for Web Applications