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OVM

Concept WIKI v1 · 5/27/2026

OVM can refer to the Open Verification Methodology in semiconductor verification, a documented methodology and building-block library that contributed core technology to UVM. In other software-engineering literature, OVM also appears as Orthogonal Variability Model, used to model variability and customization in SaaS applications.

Overview

OVM is an acronym with at least two technically documented uses in the provided sources:

  1. Open Verification Methodology — a semiconductor design verification methodology with a supporting building-block library.
  2. Orthogonal Variability Model — a variability-modeling approach used in software product-line and SaaS customization contexts.

In the hardware verification context, OVM is historically important because the Accellera UVM standard was built using the existing OVM code base together with contributions from VMM. The cited evidence describes OVM as forming the core of UVM, allowing UVM users to carry forward object-oriented design and methodology experience developed in OVM.

Open Verification Methodology

The Open Verification Methodology (OVM) is described as a documented methodology with a supporting building-block library for verifying semiconductor chip designs. It emerged in the broader industry move toward standardized IP verification methodologies built on SystemVerilog and object-oriented verification practices.

OVM contributed substantially to the later Universal Verification Methodology (UVM) standard. The evidence states that Accellera UVM was created through cooperation between EDA vendors and customers, using the existing OVM code base and VMM contributions as a foundation. It also identifies the resulting UVM technology as a hybrid drawing from Mentor AVM, Mentor and Cadence OVM, Verisity eRM, Synopsys VMM-RAL, and added technologies such as Resources, TLM, and Phasing.

Relationship to UVM

OVM is best understood as a predecessor and core foundation for UVM in the provided hardware-verification evidence. UVM standardizes a SystemVerilog-based methodology for reusable and interoperable testbenches, while OVM supplied an existing methodology base and code foundation that was incorporated into that standardization effort.

Orthogonal Variability Model usage

The public SaaS-related sources use OVM to mean Orthogonal Variability Model. In that context, OVM is used to model variability separately from other design concerns and to provide tenants with a simpler customization model. The cited SaaS papers apply it to customizable Software-as-a-Service applications, including tenant customization validation and generation of understandable customization models.

LINKED ENTITIES

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CITATIONS

5 sources
5 citations
[1] Open Verification Methodology is a documented methodology with a supporting building-block library for verification of semiconductor chip designs. [PDF] UVM based design verification of a RISC-V CPU core - POLITesi
[2] The Accellera UVM standard was founded on the existing OVM code base and contributions from VMM. [PDF] UVM based design verification of a RISC-V CPU core - POLITesi
[3] OVM forms the core of UVM, carrying forward object-oriented design and methodology experience into UVM projects. [PDF] UVM based design verification of a RISC-V CPU core - POLITesi
[4] In SaaS customization literature, OVM is used as Orthogonal Variability Model to provide tenants with a simple and understandable customization model. An Aspect-Oriented Approach for SaaS Application Customization
[5] Orthogonal Variability Model is used to model variability in a separate model for customizable SaaS applications. Variability Modeling for Customizable SaaS Applications