Overview

Model checking is discussed in the evidence as a formal verification method used in hardware verification. It is listed alongside symbolic execution as an example of formal verification methods that use mathematical reasoning to prove that a hardware design conforms to its specification.[C1]

Use in processor and RISC-V verification

In the RISC-V processor-verification context, the evidence notes that a few formal approaches based on model checking techniques have been proposed. These are positioned among other verification strategies such as directed test suites, simulation-based techniques, constraint-based specifications, and coverage-guided fuzzing.[C2]

Scalability considerations

The evidence highlights scalability as a key limitation. One source states that formal verification methods, including model checking, have a well-known state-explosion problem and therefore do not scale well for complex RTL designs such as processors.[C3] Another RISC-V verification source similarly says that model-checking-based formal techniques may be susceptible to scalability issues.[C4]