mixin_dir_instr_list function

CodeArtifact

mixin_dir_instr_list is the lazy directed-stream merging routine shown in Listing 6 of the RISCV-DV refactoring described in the DVCon paper “Crafting a Million Instructions/Sec RISCV-DV.” It replaces a greedy queue-insertion approach with a two-phase scheme that records insertion locations and then builds the merged instruction list in one pass, reducing the directed-stream insertion process from O(n²) to O(n).

First seen 5/25/2026

Last seen 5/25/2026

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Overview

mixin_dir_instr_list(riscv_instr_stream[] dir_list) is presented as Listing 6, titled “Lazy merging of directed streams to make RISCV-DV scalable.” The function merges directed instruction streams into an existing randomized instruction list without immediately inserting each stream into the queue at its chosen location. Instead, it records where streams should be injected and later constructs a merged instruction dump in one pass. [C1]

Motivation

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Lazy Merging of Directed Streams implements → 100% 2e

The mixin_dir_instr_list function implements the lazy merging algorithm for directed streams.

riscv-dv part of → 100% 1e

The mixin_dir_instr_list function is part of the RISCV-DV eUVM implementation.

CITATIONS

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[1] C1: mixin_dir_instr_list is shown as Listing 6, titled “Lazy merging of directed streams to make RISCV-DV scalable,” and merges directed streams lazily into an instruction list. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[2] C2: The original RISCV-DV merge process used greedy insertion into a SystemVerilog queue, leading to O(n²) complexity and poor scaling for very large instruction counts. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[3] C3: The function initializes mixed-list bookkeeping, stores dir_list in this.dir_instr_list, iterates over directed streams, accumulates mixed_count, selects rnd_idx, and records stream indices in dir_n. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[4] C4: When multiple directed streams target the same location, the function chains them using the next_stream field embedded in the stream object. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[5] C5: The merged list is built by iterating over instr_list, emitting any directed-stream instructions chained at each index, then the original instruction, and finally assimilating mixed_list into instr_list. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[6] C6: The refactoring reduces the merge process to O(n), avoids queue insertions, creates the merged instruction dump in one pass, and was reported to remove the merge bottleneck for large test programs. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings

[7] C7: Larger test programs are described as helping generate increasingly complex program flows that are more likely to uncover processor bugs. [PDF] Crafting a Million Instructions/Sec RISCV-DV - DVCon Proceedings