load instruction generation
ConceptIn OTBN's random instruction generator, load instruction generation is supported by placing a small amount of randomly initialised data in DMEM so loads can be emitted even near the start of execution without depending on uninitialised memory.
First seen 6/1/2026
Last seen 6/1/2026
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Overview
In the OTBN Random Instruction Generator (otbn-rig), load instruction generation is handled conservatively so that generated programs do not depend on uninitialised state. The generator is designed so execution never depends on uninitialised memories, and it adds some randomly initialised data in DMEM specifically to make load instructions possible early in a run.
How otbn-rig supports load instructions
NEIGHBORHOOD
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2 connectionsotbn-rig generates load instructions using pre-seeded dmem data
Randomly initialised data in dmem is used to enable load instruction generation from the start of the run
CITATIONS
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[1] OTBN's random program generator is designed so execution never depends on uninitialised memories or other architecturally unspecified behaviour. OTBN Random Instruction Generator - OpenTitan
[2] To support load instruction generation near the start of execution, the generated program includes a few words of randomly initialised data scattered around DMEM. OTBN Random Instruction Generator - OpenTitan
[3] This mechanism is part of `otbn-rig`, the OTBN Random Instruction Generator. OTBN Random Instruction Generator - OpenTitan