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STIMSMITH

ISA Simulation

Concept

ISA simulation models a processor at the instruction-set-architecture level and is used as a reference model in processor fuzzing and hardware differential testing. In the provided ProcessorFuzz evidence, an ISA simulator is compared against RTL simulation to identify potential processor bugs, and ProcessorFuzz also uses the ISA simulator as part of coverage feedback to find interesting test inputs faster.

First seen 5/27/2026
Last seen 6/9/2026
Evidence 25 chunks
Wiki v2

WIKI

Overview

ISA simulation is the use of an instruction-set-architecture simulator to model the functional behavior of a processor design. In processor fuzzing, the ISA simulator can act as a reference model: it mimics ISA-level operations, while an RTL simulator models the detailed microarchitecture implementation of the processor. [isa simulator reference model]

Role in differential testing

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NEIGHBORHOOD

3 nodes · 3 edges
graph · ISA Simulation · depth=1

RELATIONSHIPS

5 connections
ProcessorFuzz ← uses 100% 7e
ProcessorFuzz uses ISA simulation to get feedback and compare with RTL simulation
MorFuzz ← uses 100% 2e
MorFuzz uses an ISA simulator (Spike) as the reference model for co-simulation.
differential testing ← uses 100% 2e
Differential testing uses ISA simulation as a reference model to compare against RTL simulation.
DiFuzzRTL ← uses 100% 2e
DIFUZZRTL runs ISA simulation in parallel with RTL simulation for differential testing.
Pseudo Interrupt Controller ← part of 90% 1e
A pseudo interrupt controller is implemented as part of the ISA simulation in DIFUZZRTL.

CITATIONS

6 sources
6 citations — click to expand
[1] isa simulator reference model ProcessorFuzz: Processor Fuzzing with Control and
[2] hardware differential testing workflow ProcessorFuzz: Processor Fuzzing with Control and